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Guide To Intel IA-64 Processors
Merced / McKinley

  • The Intel Merced processor (P7)

    Jointly developed by Intel and Hewlett Packard and built on 0.18 micron technology, the Merced is designed to leapfrog current RISC processor designs. It is based on the new IA-64 instruction set and is completely backward compatible with existing x86 software. Through a software emulator, the Merced will also be able to run HP's PA-RISC software. In December 1997, Sun Microsystems Inc announced that the Merced will also be able to run its Solaris operating system. Release date is expected to be December 1999 and clock speeds between 600MHz to 1GHz are expected.

    The Merced is targetted at the server and workstation market and is not expected to filter down to desktop applications in the immediate future. The same applies to the IA-64 architecture that it is based on. IA-64 is meant to run in parallel to IA-32 for at least the next 5 years and is not a direct replacement for it.

    Notes on IA-64:

    IA-64 is completely different from the existing IA-32 architecture. Unlike CISC or RISC, it uses a new type of encoding format called EPIC (Explicitly Parallel Instruction Computing), that combines 3 fixed length instructions into a single 128-bit bundle that can be processed at a much higher speed. IA-64 also utilizes other techniques like predication, branch elimination and speculative loading, to increase processing efficiency.

    Advantages of IA-64 over existing x86 code:

  • IA-64 uses simple fixed-length instructions much like RISC
  • IA-64 can optimize the instruction stream during compilation
  • IA-64 can reorder the instruction steam during compilation
  • IA-64 has a more advanced branch prediction technique
  • IA-64 can load data before it is needed


  • The Intel McKinley processor (P7?)

    McKinley, Merced's successor, is ready in the pipeline. Little is know at this point in time, but it is speculated that the IA-64 based McKinley will be running at a frequency higher than 1000MHz (1GHz) and will be manufactured on 0.18 and 0.13 micron technology.

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    Last modified on September 20, 1997